NHD-0440AZ
After CGRAM read operation, display shift may not be executed correctly.
NOTE: In case of RAM write operation, AC is increased/decreased by 1 as in read operation.
At this time, AC indicates next address position, but
only the previous data can
be read by the read instruction.
Instruction table
Instruction code
Instruction
RS
R/
W
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Description
Execution
Time (fosc=
270 KHZ
Clear
Display
0000000001DDRAM address to “00H”
Write “20H” to DDRA and set
from AC
1.53ms
Return
Home
000000001-Its original position if shifted.
Set DDRAM address to “00H”
From AC and return cursor to
The contents of DDRAM are
not changed.
1.53ms
Entry mode
Set
00000001I/D SH Assign cursor moving direction And blinking of entire display
39us
Display ON/
OFF control
0000001D C B Blinking of cursor (B) on/off
Set display (D), cursor (C), and
Control bit.
Cursor or
Display shift
0 0 0 0 0 1 S/C R/L - -
Set cursor moving and display
Shift control bit, and the
Direction, without changing of
DDRAM data.
39us
Function set
00001DL N F- -Bit/4-bit), numbers of display Line (N: =2-line/1-line) and,
Set interface data length (DL: 8-
Display font type (F: 5x11/5x8)
39us
Set CGRAM
Address
0 0 0 1 AC5 AC4 AC3 AC2 AC1 AC0 Set CGRAM address in address Counter.
39us
Set DDRAM
Address
0 0 1 AC6 AC5 AC4 AC3 AC2 AC1 AC0 Set DDRAM address in address Counter.
39us
Read busy
Flag and
Address
0 1 BF AC6 AC5 AC4 AC3 AC2 AC1 AC0 By reading BF. The contents of
Whether during internal
Operation or not can be known
Address counter can also be
read.
0us
Write data to
Address
1 0 D7 D6 D5 D4 D3 D2 D1 D0 Write data into internal RAM (DDRAM/CGRAM).
43us
Read data
From RAM
1 1 D7 D6 D5 D4 D3 D2 D1 D0 Read data from internal RAM (DDRAM/CGRAM).
43us
NOTE: When an MPU program with checking the busy flag (DB7) is made, it must be
necessary 1/2fosc is necessary for executing the next instruction by the falling edge
of the “E” signal after the busy flag (DB7) goes to “Low”.
DDRAM address:
Display position
1
2
3
4
5
-
-
-
-
-
-
-
-
-
-
36
37
38
39
40
00 01 02 03 04 - - - - - - - - - - 23 24 25 26 27
40 40 41 42 43 - - - - - - - - - - 63 64 65 66 67
00 01 02 03 04 - - - - - - - - - - 23 24 25 26 27
40 40 41 42 43 - - - - - - - - - - 63 64 65 66 67
DDRAM address
V: A 8/9 01/31/2007
相关PDF资料
NHD-0440AZ-FL-YBW LCD MOD CHAR 4X40 Y/G TRANSFL
NHD-0440AZ-FSW-FBW LCD MOD CHAR 4X40 WH TRANSFL
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NHD-0440WH-ATFH-JT# LCD MOD CHAR 4X40 WH TRANSFL
NHD-0440WH-ATMI-JT# LCD MOD CHAR 4X40 WH TRANSM
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